About me

I recently received my Ph.D. degree in Computer Engineering from the University of Southern California. I worked with Professor Timothy Mark Pinkston in the area of Computer Architecture. My research interests focus on the management of shared on-chip resources, including last-level cache, memory bandwidth and on-chip network. I am currently looking for a job.

Research Interests

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Cache and Memory Bandwidth Management in Chip Multiprocessors, Interconnection Network Design

High Performance Router Design (Switch Architecture and Packet Scheduler)

Publications

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Journal paper

Efficient Implementation of Globally-aware Network Flow Control
Lizhong Chen, Ruisheng Wang and Timothy Mark Pinkston
in Journal of Parallel and Distributed Computing (JPDC), volume 72, issue 11, November 2012
[paper] [doi]

Conference Papers

Futility Scaling: High-Associativity Cache Partitioning
Ruisheng Wang and Lizhong Chen
in Proceedings of the 47th IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2014
[paper] [doi]

MP3: Minimizing Performance Penalty for Power-gating of Clos Network-on-Chip
Lizhong Chen, Lihang Zhao, Ruisheng Wang and Timothy Mark Pinkston
in Proceedings of the 20th IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2014
[paper] [doi]

Bubble Coloring: Avoiding Routing- and Protocol-induced Deadlocks with Minimal Virtual Channel Requirement
Ruisheng Wang, Lizhong Chen and Timothy Mark Pinkston
in Proceedings of the 27th International Conference on Supercomputing (ICS), June 2013
[paper] [doi]

An Analytical Performance Model for Partitioning Off-Chip Memory Bandwidth
Ruisheng Wang, Lizhong Chen and Timothy Mark Pinkston
in Proceedings of the 27th IEEE International Parallel & Distributed Processing Symposium (IPDPS), May 2013
[paper] [doi]

Critical Bubble Scheme: An Efficient Implementation of Globally-aware Network Flow Control
Lizhong Chen, Ruisheng Wang and Timothy Mark Pinkston
in Proceedings of the 25th IEEE International Parallel & Distributed Processing Symposium (IPDPS), May 2011
[paper] [doi]

Thread Criticality Support in On-Chip Networks
Yuho Jin, Ruisheng Wang, Woojin Choi and Timothy Mark Pinkston
in Proceedings of Third International Workshop on Network on Chip Architectures (NoCArc 2010), held in conjunction with the 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-43)
[paper] [doi]

HOBRP: A Hardware Optimized Packet Scheduler that Provides Tunable End-to-end Delay Bound
Ruisheng Wang, Youjian Zhao, Hongtao Guan and Guanghui Yang
in Proceedings of 17th IEEE International Workshop on Quality of Service (IWQoS), July 2009
[paper] [doi]

Achieving 100% Throughput in a Two-stage Multicast Switch
Ruisheng Wang, Youjian Zhao and Ting Zhou
in Proceedings of 23rd International Conference on Information Networking (ICOIN), January 2009
[paper] [IEEExplore]

Technical Report

Ruisheng Wang and Lizhong Chen, "Futility Scaling: High-Associativity Cache Partitioning (extended version)", University of Southern California, Technical Report CENG-2014-07, 2014. [pdf]

Thesis

Ruisheng Wang, "Efficient Techniques for Sharing On-chip Resources in CMPs", University of Southern California, 2017. [talk]

Experiences

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University of Southern California, USA

• Research Assistant, 2009.8 ~ 2017.5
• • Worked on multicore resource management
  • Mentor: Professor Timothy Mark Pinkston
• Teaching Assistant
• • CSCI 270 Introduction to Algorithms and Theory of Computing, Spring 2014, Fall 2014, Spring 2015, Fall 2016
  • CSCI 570 Analysis of Algorithms, Fall 2013
  • CSCI 455 Introduction to Programming Systems Design, Fall 2012, Spring 2013

Ericsson, San Jose, USA

• Summer Intern, 2012.5 ~ 2012.8
• • Worked on the project of designing a functional simulator for Ericsson’s next-generation many-core network processor
  • Implemented the modules of error handling and performance counters
  • Mentor: Arun Balakrishnan, Manager: Anubrata Mitra

Computer Network and Protocol Testing Laboratory at Tsinghua University, Beijing, China

• Research Assistant, 2006.9 ~ 2009.6
• • Worked on "CNGI Backbone Network Monitoring and Performance Analyzing System" Project
  • Designed and implemented the software system (including a command-line user interface and drivers) of MC400 -- a network monitoring & control device
  • Designed and implemented Packet Classification and Forwarding module in the FPGA of MC400
  • Mentor: Professor Youjian Zhao